MRAM-based Analog Sigmoid Function for In-memory Computing
This work addresses hardware efficiency challenges for in-memory computing systems, offering significant power and area savings, though it is incremental as it builds on existing analog and MRAM-based methods.
The authors tackled the problem of implementing an analog sigmoid activation function for in-memory computing by proposing a circuit using SOT-MRAM devices and a CMOS inverter, achieving up to 4931x smaller area and 13.3x energy reduction compared to state-of-the-art implementations.
We propose an analog implementation of the transcendental activation function leveraging two spin-orbit torque magnetoresistive random-access memory (SOT-MRAM) devices and a CMOS inverter. The proposed analog neuron circuit consumes 1.8-27x less power, and occupies 2.5-4931x smaller area, compared to the state-of-the-art analog and digital implementations. Moreover, the developed neuron can be readily integrated with memristive crossbars without requiring any intermediate signal conversion units. The architecture-level analyses show that a fully-analog in-memory computing (IMC) circuit that use our SOT-MRAM neuron along with an SOT-MRAM based crossbar can achieve more than 1.1x, 12x, and 13.3x reduction in power, latency, and energy, respectively, compared to a mixed-signal implementation with analog memristive crossbars and digital neurons. Finally, through cross-layer analyses, we provide a guide on how varying the device-level parameters in our neuron can affect the accuracy of multilayer perceptron (MLP) for MNIST classification.