Compilation and Optimizations for Efficient Machine Learning on Embedded Systems
This addresses resource constraints for embedded system developers, but it appears incremental as it builds on existing optimization techniques.
The paper tackles the challenge of running deep neural networks on embedded systems with limited resources by introducing design methodologies like efficient model designs and hardware/software co-design, resulting in improved efficiency for ML applications.
Deep Neural Networks (DNNs) have achieved great success in a variety of machine learning (ML) applications, delivering high-quality inferencing solutions in computer vision, natural language processing, and virtual reality, etc. However, DNN-based ML applications also bring much increased computational and storage requirements, which are particularly challenging for embedded systems with limited compute/storage resources, tight power budgets, and small form factors. Challenges also come from the diverse application-specific requirements, including real-time responses, high-throughput performance, and reliable inference accuracy. To address these challenges, we introduce a series of effective design methodologies, including efficient ML model designs, customized hardware accelerator designs, and hardware/software co-design strategies to enable efficient ML applications on embedded systems.