QUANT-PHLGDec 1, 2022

An exponentially-growing family of universal quantum circuits

arXiv:2212.00736v330 citationsh-index: 18
Originality Incremental advance
AI Analysis

This addresses a key bottleneck in quantum machine learning for researchers and practitioners by enabling more expressive models without increasing qubit counts, though it appears incremental as it builds on existing angle-embedded quantum neural networks.

The paper tackles the problem of vanishing gradients (barren plateaus) and limited expressivity in quantum machine learning circuits by introducing new architectures with exponentially growing Fourier degrees, enabling highly expressive circuits with low qubit counts. It shows a 44.7% reduction in mean square error compared to linear architectures in a test problem and demonstrates feasibility on a trapped-ion quantum processor.

Quantum machine learning has become an area of growing interest but has certain theoretical and hardware-specific limitations. Notably, the problem of vanishing gradients, or barren plateaus, renders the training impossible for circuits with high qubit counts, imposing a limit on the number of qubits that data scientists can use for solving problems. Independently, angle-embedded supervised quantum neural networks were shown to produce truncated Fourier series with a degree directly dependent on two factors: the depth of the encoding and the number of parallel qubits the encoding applied to. The degree of the Fourier series limits the model expressivity. This work introduces two new architectures whose Fourier degrees grow exponentially: the sequential and parallel exponential quantum machine learning architectures. This is done by efficiently using the available Hilbert space when encoding, increasing the expressivity of the quantum encoding. Therefore, the exponential growth allows staying at the low-qubit limit to create highly expressive circuits avoiding barren plateaus. Practically, parallel exponential architecture was shown to outperform the existing linear architectures by reducing their final mean square error value by up to 44.7% in a one-dimensional test problem. Furthermore, the feasibility of this technique was also shown on a trapped ion quantum processing unit.

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