Real-time FPGA implementation of the Semi-Global Matching stereo vision algorithm for a 4K/UHD video stream
This addresses the problem of high-resolution real-time stereo vision for applications like robotics or autonomous systems, though it is incremental as it adapts an existing method to new hardware constraints.
The paper tackled real-time stereo vision for 4K/UHD video by implementing a modified Semi-Global Matching algorithm on an FPGA, achieving processing at 30 frames per second with a 64-pixel disparity range and results comparable to the original design.
In this paper, we propose a real-time FPGA implementation of the Semi-Global Matching (SGM) stereo vision algorithm. The designed module supports a 4K/Ultra HD (3840 x 2160 pixels @ 30 frames per second) video stream in a 4 pixel per clock (ppc) format and a 64-pixel disparity range. The baseline SGM implementation had to be modified to process pixels in the 4ppc format and meet the timing constrains, however, our version provides results comparable to the original design. The solution has been positively evaluated on the Xilinx VC707 development board with a Virtex-7 FPGA device.