ARCVLGFeb 3, 2023

An Optical XNOR-Bitcount Based Accelerator for Efficient Inference of Binary Neural Networks

arXiv:2302.06405v27 citationsh-index: 15Has Code
AI Analysis

This work addresses efficiency bottlenecks in hardware accelerators for BNNs, which are crucial for low-power AI inference, though it is incremental as it builds on existing photonic accelerator designs.

The paper tackled the need for improved area, energy efficiency, and throughput in photonic integrated circuit-based accelerators for Binary Neural Networks (BNNs) by inventing a single-MRR-based optical XNOR gate and a novel Photo-Charge Accumulator bitcount circuit, resulting in up to 62x higher frames-per-second and 7.6x better energy efficiency compared to prior accelerators.

Binary Neural Networks (BNNs) are increasingly preferred over full-precision Convolutional Neural Networks(CNNs) to reduce the memory and computational requirements of inference processing with minimal accuracy drop. BNNs convert CNN model parameters to 1-bit precision, allowing inference of BNNs to be processed with simple XNOR and bitcount operations. This makes BNNs amenable to hardware acceleration. Several photonic integrated circuits (PICs) based BNN accelerators have been proposed. Although these accelerators provide remarkably higher throughput and energy efficiency than their electronic counterparts, the utilized XNOR and bitcount circuits in these accelerators need to be further enhanced to improve their area, energy efficiency, and throughput. This paper aims to fulfill this need. For that, we invent a single-MRR-based optical XNOR gate (OXG). Moreover, we present a novel design of bitcount circuit which we refer to as Photo-Charge Accumulator (PCA). We employ multiple OXGs in a cascaded manner using dense wavelength division multiplexing (DWDM) and connect them to the PCA, to forge a novel Optical XNOR-Bitcount based Binary Neural Network Accelerator (OXBNN). Our evaluation for the inference of four modern BNNs indicates that OXBNN provides improvements of up to 62x and 7.6x in frames-per-second (FPS) and FPS/W (energy efficiency), respectively, on geometric mean over two PIC-based BNN accelerators from prior work. We developed a transaction-level, event-driven python-based simulator for evaluation of accelerators (https://github.com/uky-UCAT/B_ONN_SIM).

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