Co-Design of Approximate Multilayer Perceptron for Ultra-Resource Constrained Printed Circuits
This enables machine learning applications for domains requiring ultra-low cost, conformity, and non-toxicity, where silicon-based systems are unsuitable.
The paper tackles the challenge of implementing machine learning on printed electronics, which have large feature sizes that limit circuit complexity, by developing an automated co-design framework using approximate computing. The result is printed multilayer perceptrons with 6x lower area, 5.7x lower power, and less than 1% accuracy loss compared to the state-of-the-art baseline.
Printed Electronics (PE) exhibits on-demand, extremely low-cost hardware due to its additive manufacturing process, enabling machine learning (ML) applications for domains that feature ultra-low cost, conformity, and non-toxicity requirements that silicon-based systems cannot deliver. Nevertheless, large feature sizes in PE prohibit the realization of complex printed ML circuits. In this work, we present, for the first time, an automated printed-aware software/hardware co-design framework that exploits approximate computing principles to enable ultra-resource constrained printed multilayer perceptrons (MLPs). Our evaluation demonstrates that, compared to the state-of-the-art baseline, our circuits feature on average 6x (5.7x) lower area (power) and less than 1% accuracy loss.