Efficient Mixed-Type Wafer Defect Pattern Recognition Using Compact Deformable Convolutional Transformers
This work addresses a domain-specific challenge in semiconductor manufacturing by enhancing defect recognition accuracy, though it appears incremental as it builds on existing transformer and deformable convolution methods.
The paper tackles the problem of mixed-type wafer defect pattern recognition, which is crucial for improving manufacturing yield, by proposing a compact deformable convolutional transformer (DC Transformer) that achieves state-of-the-art performance on a real dataset with 38 defect patterns.
Manufacturing wafers is an intricate task involving thousands of steps. Defect Pattern Recognition (DPR) of wafer maps is crucial to find the root cause of the issue and further improving the yield in the wafer foundry. Mixed-type DPR is much more complicated compared to single-type DPR due to varied spatial features, the uncertainty of defects, and the number of defects present. To accurately predict the number of defects as well as the types of defects, we propose a novel compact deformable convolutional transformer (DC Transformer). Specifically, DC Transformer focuses on the global features present in the wafer map by virtue of learnable deformable kernels and multi-head attention to the global features. The proposed method succinctly models the internal relationship between the wafer maps and the defects. DC Transformer is evaluated on a real dataset containing 38 defect patterns. Experimental results show that DC Transformer performs exceptionally well in recognizing both single and mixed-type defects. The proposed method outperforms the current state of the models by a considerable margin