Leveraging Residue Number System for Designing High-Precision Analog Deep Neural Network Accelerators
This addresses the problem of costly high-precision data converters for researchers and engineers in hardware acceleration, offering a novel approach with significant energy savings.
The paper tackles the challenge of achieving high accuracy with energy efficiency in analog DNN accelerators by using the residue number system (RNS) to compose high-precision operations from low-precision ones, resulting in 99% FP32 accuracy with 6-bit precision data converters and reducing energy consumption by several orders of magnitude.
Achieving high accuracy, while maintaining good energy efficiency, in analog DNN accelerators is challenging as high-precision data converters are expensive. In this paper, we overcome this challenge by using the residue number system (RNS) to compose high-precision operations from multiple low-precision operations. This enables us to eliminate the information loss caused by the limited precision of the ADCs. Our study shows that RNS can achieve 99% FP32 accuracy for state-of-the-art DNN inference using data converters with only $6$-bit precision. We propose using redundant RNS to achieve a fault-tolerant analog accelerator. In addition, we show that RNS can reduce the energy consumption of the data converters within an analog accelerator by several orders of magnitude compared to a regular fixed-point approach.