ARAISPSep 23, 2023

AxOMaP: Designing FPGA-based Approximate Arithmetic Operators using Mathematical Programming

arXiv:2309.13445v15 citationsh-index: 21
Originality Incremental advance
AI Analysis

This work addresses the need for efficient hardware in resource-constrained embedded systems, though it is incremental as it builds on existing evolutionary optimization methods.

The paper tackles the problem of designing low-cost approximate arithmetic operators for FPGAs to improve power, performance, and area (PPA) in embedded machine learning systems, reporting up to 21% improvement in hypervolume for joint optimization of PPA and behavioral accuracy in signed 8-bit multipliers.

With the increasing application of machine learning (ML) algorithms in embedded systems, there is a rising necessity to design low-cost computer arithmetic for these resource-constrained systems. As a result, emerging models of computation, such as approximate and stochastic computing, that leverage the inherent error-resilience of such algorithms are being actively explored for implementing ML inference on resource-constrained systems. Approximate computing (AxC) aims to provide disproportionate gains in the power, performance, and area (PPA) of an application by allowing some level of reduction in its behavioral accuracy (BEHAV). Using approximate operators (AxOs) for computer arithmetic forms one of the more prevalent methods of implementing AxC. AxOs provide the additional scope for finer granularity of optimization, compared to only precision scaling of computer arithmetic. To this end, designing platform-specific and cost-efficient approximate operators forms an important research goal. Recently, multiple works have reported using AI/ML-based approaches for synthesizing novel FPGA-based AxOs. However, most of such works limit usage of AI/ML to designing ML-based surrogate functions used during iterative optimization processes. To this end, we propose a novel data analysis-driven mathematical programming-based approach to synthesizing approximate operators for FPGAs. Specifically, we formulate mixed integer quadratically constrained programs based on the results of correlation analysis of the characterization data and use the solutions to enable a more directed search approach for evolutionary optimization algorithms. Compared to traditional evolutionary algorithms-based optimization, we report up to 21% improvement in the hypervolume, for joint optimization of PPA and BEHAV, in the design of signed 8-bit multipliers.

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