Full-Stack Optimization for CAM-Only DNN Inference
This addresses energy efficiency and reliability challenges in computing-in-memory systems for deep learning inference, representing an incremental advance in hardware-software co-design.
The paper tackles the high energy and latency of neural network inference in von Neumann systems by combining algorithmic optimizations for ternary weight networks with associative processors using racetrack memory, achieving a 7.5x improvement in energy efficiency for ResNet-18 on ImageNet while maintaining accuracy.
The accuracy of neural networks has greatly improved across various domains over the past years. Their ever-increasing complexity, however, leads to prohibitively high energy demands and latency in von Neumann systems. Several computing-in-memory (CIM) systems have recently been proposed to overcome this, but trade-offs involving accuracy, hardware reliability, and scalability for large models remain a challenge. Additionally, for some CIM designs, the activation movement still requires considerable time and energy. This paper explores the combination of algorithmic optimizations for ternary weight neural networks and associative processors (APs) implemented using racetrack memory (RTM). We propose a novel compilation flow to optimize convolutions on APs by reducing their arithmetic intensity. By leveraging the benefits of RTM-based APs, this approach substantially reduces data transfers within the memory while addressing accuracy, energy efficiency, and reliability concerns. Concretely, our solution improves the energy efficiency of ResNet-18 inference on ImageNet by 7.5x compared to crossbar in-memory accelerators while retaining software accuracy.