A Fast Algorithm to Simulate Nonlinear Resistive Networks
This work addresses a critical scalability issue for researchers in analog and energy-efficient computing, enabling more rapid progress in simulating nonlinear networks.
The paper tackles the bottleneck of simulating nonlinear resistive networks for analog computing by introducing a novel quadratic programming approach with a fast coordinate descent algorithm, achieving up to 327 times larger network training and 160 times faster speeds compared to SPICE-based methods.
Analog electrical networks have long been investigated as energy-efficient computing platforms for machine learning, leveraging analog physics during inference. More recently, resistor networks have sparked particular interest due to their ability to learn using local rules (such as equilibrium propagation), enabling potentially important energy efficiency gains for training as well. Despite their potential advantage, the simulations of these resistor networks has been a significant bottleneck to assess their scalability, with current methods either being limited to linear networks or relying on realistic, yet slow circuit simulators like SPICE. Assuming ideal circuit elements, we introduce a novel approach for the simulation of nonlinear resistive networks, which we frame as a quadratic programming problem with linear inequality constraints, and which we solve using a fast, exact coordinate descent algorithm. Our simulation methodology significantly outperforms existing SPICE-based simulations, enabling the training of networks up to 327 times larger at speeds 160 times faster, resulting in a 50,000-fold improvement in the ratio of network size to epoch duration. Our approach can foster more rapid progress in the simulations of nonlinear analog electrical networks.