Escaping Local Optima in Global Placement
This addresses the issue of unreliable placements in physical design for chip designers, but it is incremental as it builds on existing analytical methods.
The paper tackles the problem of DREAMPlace getting stuck in local optima in global placement, which leads to fragile and unpredictable results, and proposes a hybrid optimization framework that achieves significant improvements over state-of-the-art methods on two benchmarks.
Placement is crucial in the physical design, as it greatly affects power, performance, and area metrics. Recent advancements in analytical methods, such as DREAMPlace, have demonstrated impressive performance in global placement. However, DREAMPlace has some limitations, e.g., may not guarantee legalizable placements under the same settings, leading to fragile and unpredictable results. This paper highlights the main issue as being stuck in local optima, and proposes a hybrid optimization framework to efficiently escape the local optima, by perturbing the placement result iteratively. The proposed framework achieves significant improvements compared to state-of-the-art methods on two popular benchmarks.