NALGMar 19, 2024

Adaptive Multilevel Neural Networks for Parametric PDEs with Error Estimation

arXiv:2403.12650v12 citations
Originality Incremental advance
AI Analysis

This work addresses computational challenges in solving parametric PDEs for scientific computing, but it appears incremental as it adapts existing finite element techniques to neural networks.

The authors tackled the problem of solving high-dimensional parameter-dependent partial differential equations by developing a neural network architecture that mimics adaptive finite element methods, enabling error control and efficient training with reduced parameters.

To solve high-dimensional parameter-dependent partial differential equations (pPDEs), a neural network architecture is presented. It is constructed to map parameters of the model data to corresponding finite element solutions. To improve training efficiency and to enable control of the approximation error, the network mimics an adaptive finite element method (AFEM). It outputs a coarse grid solution and a series of corrections as produced in an AFEM, allowing a tracking of the error decay over successive layers of the network. The observed errors are measured by a reliable residual based a posteriori error estimator, enabling the reduction to only few parameters for the approximation in the output of the network. This leads to a problem adapted representation of the solution on locally refined grids. Furthermore, each solution of the AFEM is discretized in a hierarchical basis. For the architecture, convolutional neural networks (CNNs) are chosen. The hierarchical basis then allows to handle sparse images for finely discretized meshes. Additionally, as corrections on finer levels decrease in amplitude, i.e., importance for the overall approximation, the accuracy of the network approximation is allowed to decrease successively. This can either be incorporated in the number of generated high fidelity samples used for training or the size of the network components responsible for the fine grid outputs. The architecture is described and preliminary numerical examples are presented.

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