Late Breaking Results: Fast System Technology Co-Optimization Framework for Emerging Technology Based on Graph Neural Networks
This addresses the need for efficient design optimization in semiconductor technology, particularly for emerging materials and devices, but is incremental as it builds on existing AI and STCO methods.
The paper tackles the challenge of optimizing power, performance, and area in next-generation IC design by proposing a fast system technology co-optimization framework using graph neural networks, achieving over a 100X speedup in TCAD simulation and cell library characterization and runtime speedups from 1.9X to 14.1X.
This paper proposes a fast system technology co-optimization (STCO) framework that optimizes power, performance, and area (PPA) for next-generation IC design, addressing the challenges and opportunities presented by novel materials and device architectures. We focus on accelerating the technology level of STCO using AI techniques, by employing graph neural network (GNN)-based approaches for both TCAD simulation and cell library characterization, which are interconnected through a unified compact model, collectively achieving over a 100X speedup over traditional methods. These advancements enable comprehensive STCO iterations with runtime speedups ranging from 1.9X to 14.1X and supports both emerging and traditional technologies.