TSB: Tiny Shared Block for Efficient DNN Deployment on NVCIM Accelerators
This work addresses a practical problem for AI hardware developers by enabling more efficient and robust DNN deployment on energy-efficient accelerators, though it is incremental as it builds on existing methods to mitigate device-specific issues.
The paper tackles the challenge of deploying deep neural networks on non-volatile compute-in-memory accelerators, which suffer from device variations that degrade inference accuracy and increase overhead, by proposing a Tiny Shared Block method that improves inference accuracy by over 20x and speeds up training by over 5x while reducing mapping costs.
Compute-in-memory (CIM) accelerators using non-volatile memory (NVM) devices offer promising solutions for energy-efficient and low-latency Deep Neural Network (DNN) inference execution. However, practical deployment is often hindered by the challenge of dealing with the massive amount of model weight parameters impacted by the inherent device variations within non-volatile computing-in-memory (NVCIM) accelerators. This issue significantly offsets their advantages by increasing training overhead, the time and energy needed for mapping weights to device states, and diminishing inference accuracy. To mitigate these challenges, we propose the "Tiny Shared Block (TSB)" method, which integrates a small shared 1x1 convolution block into the DNN architecture. This block is designed to stabilize feature processing across the network, effectively reducing the impact of device variation. Extensive experimental results show that TSB achieves over 20x inference accuracy gap improvement, over 5x training speedup, and weights-to-device mapping cost reduction while requiring less than 0.4% of the original weights to be write-verified during programming, when compared with state-of-the-art baseline solutions. Our approach provides a practical and efficient solution for deploying robust DNN models on NVCIM accelerators, making it a valuable contribution to the field of energy-efficient AI hardware.