A System Level Performance Evaluation for Superconducting Digital Systems
This addresses memory and interconnect limitations for next-generation compute systems, but appears incremental as it applies a cross-layer modeling approach to an emerging technology.
The paper tackles the problem of evaluating system-level performance benefits of Superconducting Digital (SCD) technology for Large Language Model (LLM) training and inference, demonstrating substantial performance gains based on experimental data and Pulse Conserving Logic design principles.
Superconducting Digital (SCD) technology offers significant potential for enhancing the performance of next generation large scale compute workloads. By leveraging advanced lithography and a 300 mm platform, SCD devices can reduce energy consumption and boost computational power. This paper presents a cross-layer modeling approach to evaluate the system-level performance benefits of SCD architectures for Large Language Model (LLM) training and inference. Our findings, based on experimental data and Pulse Conserving Logic (PCL) design principles, demonstrate substantial performance gain in both training and inference. We are, thus, able to convincingly show that the SCD technology can address memory and interconnect limitations of present day solutions for next-generation compute systems.