Restructuring Tractable Probabilistic Circuits
This work addresses a bottleneck in tractable probabilistic inference for applications like controllable text generation, though it is incremental as it builds on existing PC frameworks.
The paper tackles the problem of multiplying probabilistic circuits (PCs) that have different structural constraints (vtrees), proposing a restructuring method to transform PCs to conform to a target vtree, which enables polynomial-time multiplication algorithms and practical depth reduction.
Probabilistic circuits (PCs) are a unifying representation for probabilistic models that support tractable inference. Numerous applications of PCs like controllable text generation depend on the ability to efficiently multiply two circuits. Existing multiplication algorithms require that the circuits respect the same structure, i.e. variable scopes decomposes according to the same vtree. In this work, we propose and study the task of restructuring structured(-decomposable) PCs, that is, transforming a structured PC such that it conforms to a target vtree. We propose a generic approach for this problem and show that it leads to novel polynomial-time algorithms for multiplying circuits respecting different vtrees, as well as a practical depth-reduction algorithm that preserves structured decomposibility. Our work opens up new avenues for tractable PC inference, suggesting the possibility of training with less restrictive PC structures while enabling efficient inference by changing their structures at inference time.