IVCVDec 3, 2024

FoveaSPAD: Exploiting Depth Priors for Adaptive and Efficient Single-Photon 3D Imaging

arXiv:2412.02052v11 citationsh-index: 3IEEE Trans Comput Imaging
Originality Highly original
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This work addresses efficiency and robustness issues in SPAD-based LiDAR for safety-critical applications like autonomous vehicles, representing a novel method for a known bottleneck.

The paper tackles the challenges of ambient light susceptibility and high data processing demands in single-photon avalanche diode (SPAD)-based LiDAR systems by proposing foveated algorithms and sensing policies that guide depth estimation. This approach reduces memory usage by 1548-fold and improves signal-to-noise ratio, as demonstrated in simulations and hardware emulation.

Fast, efficient, and accurate depth-sensing is important for safety-critical applications such as autonomous vehicles. Direct time-of-flight LiDAR has the potential to fulfill these demands, thanks to its ability to provide high-precision depth measurements at long standoff distances. While conventional LiDAR relies on avalanche photodiodes (APDs), single-photon avalanche diodes (SPADs) are an emerging image-sensing technology that offer many advantages such as extreme sensitivity and time resolution. In this paper, we remove the key challenges to widespread adoption of SPAD-based LiDARs: their susceptibility to ambient light and the large amount of raw photon data that must be processed to obtain in-pixel depth estimates. We propose new algorithms and sensing policies that improve signal-to-noise ratio (SNR) and increase computing and memory efficiency for SPAD-based LiDARs. During capture, we use external signals to \emph{foveate}, i.e., guide how the SPAD system estimates scene depths. This foveated approach allows our method to ``zoom into'' the signal of interest, reducing the amount of raw photon data that needs to be stored and transferred from the SPAD sensor, while also improving resilience to ambient light. We show results both in simulation and also with real hardware emulation, with specific implementations achieving a 1548-fold reduction in memory usage, and our algorithms can be applied to newly available and future SPAD arrays.

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