ARAIFeb 23, 2025

Optimizing Coverage-Driven Verification Using Machine Learning and PyUVM: A Novel Approach

arXiv:2503.11666v12 citationsh-index: 5ISCAS
Originality Incremental advance
AI Analysis

This addresses verification inefficiencies for SoC designers, though it appears incremental as it builds on existing coverage-driven methods with ML enhancements.

The paper tackles the bottleneck in System-on-Chip verification by proposing a supervised machine learning methodology to optimize simulation regressions, achieving at least 99% coverage regain with significantly reduced simulation cycles and costs.

The escalating complexity of System-on-Chip (SoC) designs has created a bottleneck in verification, with traditional techniques struggling to achieve complete coverage. Existing techniques, such as Constrained Random Verification (CRV) and coverage-driven methodologies, rely on time-consuming and redundant simulation regression, leading to higher verification costs and longer time-to-market due to the manual effort required to adjust constraints and drive the stimuli to achieve coverage objectives. To address this challenge, we propose a novel methodology that leverages supervised Machine Learning (ML) to optimize simulation regressions, resulting in reduced simulation run-time and the number of test simulations required to achieve target coverage goals. We also investigate and compare the effectiveness of various supervised learning algorithms from scikit-learn. Our results demonstrate that these algorithms can achieve at least 99% coverage regain with significantly reduced simulation cycles. We utilize Python Universal Verification Methodology (PyUVM) over SystemVerilog-Universal Verification Methodology (SV-UVM) for testbench creation, enabling simpler constructs using Python and facilitating the reuse of existing ML libraries. Our methodology is applied to three diverse designs, and our results show that it can significantly reduce verification costs, manual efforts, and time-to-market, while enhancing verification productivity and completeness, by automating the testbench update process and achieving target coverage goals.

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