ROMA: a Read-Only-Memory-based Accelerator for QLoRA-based On-Device LLM
This work addresses the problem of efficient on-device LLM deployment for edge computing applications, offering a novel hardware accelerator design that is incremental in optimizing existing QLoRA methods.
The authors tackled the challenge of deploying large language models on edge devices by proposing ROMA, a QLoRA accelerator that uses a hybrid storage architecture with ROM for quantized base models and SRAM for LoRA weights and KV cache, achieving a generation speed exceeding 20,000 tokens/s for models like a 4-bit 3B and 2-bit 8B LLaMA entirely on-chip.
As large language models (LLMs) demonstrate powerful capabilities, deploying them on edge devices has become increasingly crucial, offering advantages in privacy and real-time interaction. QLoRA has emerged as the standard approach for on-device LLMs, leveraging quantized models to reduce memory and computational costs while utilizing LoRA for task-specific adaptability. In this work, we propose ROMA, a QLoRA accelerator with a hybrid storage architecture that uses ROM for quantized base models and SRAM for LoRA weights and KV cache. Our insight is that the quantized base model is stable and converged, making it well-suited for ROM storage. Meanwhile, LoRA modules offer the flexibility to adapt to new data without requiring updates to the base model. To further reduce the area cost of ROM, we introduce a novel B-ROM design and integrate it with the compute unit to form a fused cell for efficient use of chip resources. ROMA can effectively store both a 4-bit 3B and a 2-bit 8B LLaMA model entirely on-chip, achieving a notable generation speed exceeding 20,000 tokens/s without requiring external memory.