Low-Bit Integerization of Vision Transformers using Operand Reordering for Efficient Hardware
This work addresses efficiency issues for hardware deployment of vision transformers, though it is incremental as it builds on existing quantization methods.
The paper tackles the computational overhead of quantized vision transformers by proposing an integerization process that delays dequantization until after matrix operations, enabling direct processing of quantized inputs. Experimental results show reduced per-PE power consumption for linear layers and matrix multiplication.
Pre-trained vision transformers have achieved remarkable performance across various visual tasks but suffer from expensive computational and memory costs. While model quantization reduces memory usage by lowering precision, these models still incur significant computational overhead due to the dequantization before matrix operations. In this work, we analyze the computation graph and propose an integerization process based on operation reordering. Specifically, the process delays dequantization until after matrix operations. This enables integerized matrix multiplication and linear module by directly processing the quantized input. To validate our approach, we synthesize the self-attention module of ViT on a systolic array-based hardware. Experimental results show that our low-bit inference reduces per-PE power consumption for linear layer and matrix multiplication, bridging the gap between quantized models and efficient inference.