FeNN: A RISC-V vector processor for Spiking Neural Network acceleration
This addresses the energy and performance bottleneck for SNN simulation in AI systems, offering a programmable solution from edge to cloud, though it is incremental as it builds on existing FPGA and RISC-V technologies.
The authors tackled the inefficiency of mainstream accelerators for Spiking Neural Networks (SNNs) by developing FeNN, a RISC-V-based vector processor for FPGAs, which demonstrated faster simulation of an SNN classifier than an embedded GPU and the Loihi neuromorphic system.
Spiking Neural Networks (SNNs) have the potential to drastically reduce the energy requirements of AI systems. However, mainstream accelerators like GPUs and TPUs are designed for the high arithmetic intensity of standard ANNs so are not well-suited to SNN simulation. FPGAs are well-suited to applications with low arithmetic intensity as they have high off-chip memory bandwidth and large amounts of on-chip memory. Here, we present a novel RISC-V-based soft vector processor (FeNN), tailored to simulating SNNs on FPGAs. Unlike most dedicated neuromorphic hardware, FeNN is fully programmable and designed to be integrated with applications running on standard computers from the edge to the cloud. We demonstrate that, by using stochastic rounding and saturation, FeNN can achieve high numerical precision with low hardware utilisation and that a single FeNN core can simulate an SNN classifier faster than both an embedded GPU and the Loihi neuromorphic system.