CutReg: A loss regularizer for enhancing the scalability of QML via adaptive circuit cutting
This work addresses the problem of scaling QML for researchers by providing an incremental method to mitigate sampling inefficiencies in circuit cutting techniques.
The paper tackles the scalability limitations of quantum machine learning (QML) on NISQ hardware by introducing a regularization term that penalizes sampling overhead from circuit cutting, enabling optimization to balance cutting costs with model accuracy.
Whether QML can offer a transformative advantage remains an open question. The severe constraints of NISQ hardware, particularly in circuit depth and connectivity, hinder both the validation of quantum advantage and the empirical investigation of major obstacles like barren plateaus. Circuit cutting techniques have emerged as a strategy to execute larger quantum circuits on smaller, less connected hardware by dividing them into subcircuits. However, this partitioning increases the number of samples needed to estimate the expectation value accurately through classical post-processing compared to estimating it directly from the full circuit. This work introduces a novel regularization term into the QML optimization process, directly penalizing the overhead associated with sampling. We demonstrate that this approach enables the optimizer to balance the advantages of gate cutting against the optimization of the typical ML cost function. Specifically, it navigates the trade-off between minimizing the cutting overhead and maintaining the overall accuracy of the QML model, paving the way to study larger complex problems in pursuit of quantum advantage.