INS-DETARCRCVJun 18, 2025

Bias Variation Compensation in Perimeter-Gated SPAD TRNGs

arXiv:2506.15888v1h-index: 5MWCAS
Originality Incremental advance
AI Analysis

This addresses bias variation in hardware random number generators for applications requiring high-quality randomness, but it is incremental as it builds on existing debiasing methods with a specific compensation technique.

The paper tackled bias variation in perimeter-gated SPAD arrays for random number generation by applying gate voltages based on dark count rates, achieving less than 1% bias variation at a raw-bit rate of 2 kHz/pixel and passing all NIST tests after debiasing.

Random number generators that utilize arrays of entropy source elements suffer from bias variation (BV). Despite the availability of efficient debiasing algorithms, optimized implementations of hardware friendly options depend on the bit bias in the raw bit streams and cannot accommodate a wide BV. In this work, we present a 64 x 64 array of perimeter gated single photon avalanche diodes (pgSPADs), fabricated in a 0.35 μm standard CMOS technology, as a source of entropy to generate random binary strings with a BV compensation technique. By applying proper gate voltages based on the devices' native dark count rates, we demonstrate less than 1% BV for a raw-bit generation rate of 2 kHz/pixel at room temperature. The raw bits were debiased using the classical iterative Von Neumann's algorithm and the debiased bits were found to pass all of the 16 tests from NIST's Statistical Test Suite.

Foundations

The foundational work for this paper's niche, ranked by how specifically the neighbourhood builds on it — not by global fame.

Your Notes