IntrinTrans: LLM-based Intrinsic Code Translator for RISC-V Vector
This addresses the time-consuming and error-prone process of cross-architecture code translation for library developers, though it is an incremental improvement over existing translation methods.
The authors tackled the problem of manually translating vectorized intrinsic code between architectures by developing IntrinTrans, an LLM-based agent that automatically translates Arm Neon to RISC-V Vector code using compile-and-test feedback. Their method achieved pass rates from 47% to 100% and performance within 0.85x to 1.28x of native implementations.
The use of intrinsic functions to leverage hardware-specific capabilities is a crucial approach for optimizing library performance. Many mainstream libraries implement a large number of vectorized algorithms on Arm or x86 SIMD (Single-Instruction, Multiple-Data) intrinsic functions. Translating existing vectorized intrinsic code into the intrinsics of an emerging architecture is a practical and effective approach. However, current cross-architecture translation largely relies on manual rewriting or rule-based mapping methods, which are both time-consuming and prone to errors. We present \texttt{IntrinTrans}, a LLM-based agent that utilizes compile-and-test feedback to translate intrinsic code across architectures automatically, and further optimizes the generated intrinsics using register-usage information derived from liveness analysis. To evaluate the effectiveness of our method, we used \texttt{IntrinTrans} to translate the open-source benchmark from Arm Neon Intrinsic to the emerging RISC-V Vector (RVV) Intrinsic implementation and compared its performance with that of the native RVV implementation. Our experiments show that advanced LLMs can generate semantically correct RVV Intrinsic functions with only a finite number of iterations. Depending on the base LLMs, the pass rate ranges from 47% to 100%, achieving performance similar to the native implementation (0.85x to 1.28x).