Bespoke Co-processor for Energy-Efficient Health Monitoring on RISC-V-based Flexible Wearables
This work addresses energy efficiency and latency issues in flexible wearables for healthcare monitoring, offering an incremental improvement over existing bendable RISC-V systems.
The paper tackled the challenge of energy-efficient on-body machine learning classification for flexible healthcare wearables by integrating a bespoke co-processor with fixed coefficients into a flexible RISC-V system, achieving a 2.35x speedup and 2.15x lower energy consumption compared to state-of-the-art solutions.
Flexible electronics offer unique advantages for conformable, lightweight, and disposable healthcare wearables. However, their limited gate count, large feature sizes, and high static power consumption make on-body machine learning classification highly challenging. While existing bendable RISC-V systems provide compact solutions, they lack the energy efficiency required. We present a mechanically flexible RISC-V that integrates a bespoke multiply-accumulate co-processor with fixed coefficients to maximize energy efficiency and minimize latency. Our approach formulates a constrained programming problem to jointly determine co-processor constants and optimally map Multi-Layer Perceptron (MLP) inference operations, enabling compact, model-specific hardware by leveraging the low fabrication and non-recurring engineering costs of flexible technologies. Post-layout results demonstrate near-real-time performance across several healthcare datasets, with our circuits operating within the power budget of existing flexible batteries and occupying only 2.42 mm^2, offering a promising path toward accessible, sustainable, and conformable healthcare wearables. Our microprocessors achieve an average 2.35x speedup and 2.15x lower energy consumption compared to the state of the art.