Learning Quantized Continuous Controllers for Integer Hardware
This work addresses the challenge of efficient policy deployment on resource-constrained embedded hardware, offering incremental improvements in quantization for reinforcement learning.
The authors tackled the problem of deploying continuous-control reinforcement learning policies on embedded hardware by developing a quantization-aware training pipeline that produces low-bit policies for integer inference, achieving competitive performance with full precision policies using as few as 2-3 bits per weight and activation, with inference latencies in microseconds and microjoules per action on an FPGA.
Deploying continuous-control reinforcement learning policies on embedded hardware requires meeting tight latency and power budgets. Small FPGAs can deliver these, but only if costly floating point pipelines are avoided. We study quantization-aware training (QAT) of policies for integer inference and we present a learning-to-hardware pipeline that automatically selects low-bit policies and synthesizes them to an Artix-7 FPGA. Across five MuJoCo tasks, we obtain policy networks that are competitive with full precision (FP32) policies but require as few as 3 or even only 2 bits per weight, and per internal activation value, as long as input precision is chosen carefully. On the target hardware, the selected policies achieve inference latencies on the order of microseconds and consume microjoules per action, favorably comparing to a quantized reference. Last, we observe that the quantized policies exhibit increased input noise robustness compared to the floating-point baseline.