Multiport Analytical Pixel Electromagnetic Simulator (MAPES) for AI-assisted RFIC and Microwave Circuit Design
For RFIC and microwave circuit designers, MAPES provides a fast, accurate, and data-overfitting-free alternative to AI-assisted EM emulators, applicable across multiple fabrication technologies.
MAPES enables efficient and accurate EM performance prediction for arbitrary pixel-based microwave/RFIC structures using a closed-form multiport matrix, achieving 600-2000x speedup over CST simulations with only ~1% of the full-wave data needed by AI emulators.
This paper proposes a novel analytical framework, denoted the Multiport Analytical Pixel Electromagnetic Simulator (MAPES). MAPES enables efficient and accurate prediction of the electromagnetic (EM) performance of arbitrary pixel-based microwave (MW) and RFIC structures. Unlike the Internal Multiport Method (IMPM), which optimizes only connecting elements within a fixed, gap-separated pixel skeleton, MAPES operates directly on the all-pixel presence/absence formulation used in recent MW/RFIC design. This is enabled by diagonal virtual pixels, an occupancy-to-load mapping, and a multi-layer/via port-level formulation that have no counterpart in IMPM. By introducing virtual pixels and diagonal virtual pixels and inserting virtual ports at critical positions, MAPES captures all horizontal, vertical, and diagonal electromagnetic couplings within a single multiport impedance matrix. Only a small set of full-wave simulations (typically about 1% of the datasets required by AI-assisted EM emulators) is needed to construct this matrix. Subsequently, any arbitrary pixel configuration can be evaluated analytically using a closed-form multiport relation without additional full-wave calculations. The proposed approach eliminates data-driven overfitting and ensures accurate results across all design variations. Using MAPES, comprehensive examples for single- and double-layer PCBs and CMOS processes (180 nm and 65 nm) confirm that high prediction accuracy with 600-2000$\times$ speed improvement is achieved compared to CST simulations. Owing to its efficiency, scalability, and reliability, MAPES provides a practical and versatile tool for AI-assisted MW circuit and RFIC design across diverse fabrication technologies.