SYSYApr 11

A Modified Boost Converter Topology for Dynamic Characterization of Hot Carrier and Trap Generation in GaN HEMTs

arXiv:2512.0168344.9h-index: 2
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For researchers in power electronics reliability, this work provides a novel circuit-based method to characterize GaN HEMT failure mechanisms, though it is an incremental improvement over existing reliability models.

This study introduces a modified boost converter circuit to accelerate hot carrier and trap generation in GaN HEMTs for reliability characterization. Experimental validation on an EPC 2038 transistor showed that the increase in drain-source on-resistance follows a logarithmic trend, and the extracted longitudinal optical phonon scattering energy at 70V and 100V was validated against existing data.

Modern microelectronic systems require long term operational stability, necessitating precise reliability models to predict device lifecycles and identify governing failure mechanisms. This is particularly critical for high power GaN High-Electron-Mobility Transistors (HEMTs), where reliability research has historically trailed behind low power digital counterparts. This study introduces a novel application of a modified boost converter circuit designed to investigate GaN failure mechanisms, specifically targeting the determination of reliability factors for the MTOL model. By utilizing a high duty cycle, the circuit stresses the device at maximum rated voltages and currents with minimal input requirements, accelerating hot carrier and trap generation without immediate detrimental failure. Experimental validation was conducted using an EPC 2038 GaN transistor under a constant drain current of 400 mA and a duty cycle of 0.7. The results confirmed that the increase in Drain-Source on-resistance ($R_{DS(on)}$) follows a logarithmic trend over time, consistent with the EPC Phase 12 reliability model. While initial tests at 40V did not successfully validate the longitudinal optical phonon scattering energy ($\hbarω_{LO}$), but were reasonably acceptable, subsequent stress tests at 70V and 100V yielded $\hbarω_{LO}$ values that were successfully validated against existing theoretical and experimental data. This methodology provides a robust framework for predicting performance and lifetime across varying operational parameters in modern power electronics.

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