KANELÉ: Kolmogorov-Arnold Networks for Efficient LUT-based Evaluation
This work addresses the need for real-time, power-efficient neural network deployment on FPGAs, particularly for applications like control systems, and is incremental as it builds on existing KAN and LUT-based methods with a novel design flow.
The paper tackles the problem of low-latency, resource-efficient neural network inference on FPGAs by introducing KANELÉ, a framework that exploits Kolmogorov-Arnold Networks (KANs) for efficient LUT-based evaluation, achieving up to a 2700x speedup and orders of magnitude resource savings compared to prior approaches.
Low-latency, resource-efficient neural network inference on FPGAs is essential for applications demanding real-time capability and low power. Lookup table (LUT)-based neural networks are a common solution, combining strong representational power with efficient FPGA implementation. In this work, we introduce KANELÉ, a framework that exploits the unique properties of Kolmogorov-Arnold Networks (KANs) for FPGA deployment. Unlike traditional multilayer perceptrons (MLPs), KANs employ learnable one-dimensional splines with fixed domains as edge activations, a structure naturally suited to discretization and efficient LUT mapping. We present the first systematic design flow for implementing KANs on FPGAs, co-optimizing training with quantization and pruning to enable compact, high-throughput, and low-latency KAN architectures. Our results demonstrate up to a 2700x speedup and orders of magnitude resource savings compared to prior KAN-on-FPGA approaches. Moreover, KANELÉ matches or surpasses other LUT-based architectures on widely used benchmarks, particularly for tasks involving symbolic or physical formulas, while balancing resource usage across FPGA hardware. Finally, we showcase the versatility of the framework by extending it to real-time, power-efficient control systems.