Surrogate Neural Architecture Codesign Package (SNAC-Pack)
This work addresses the challenge of hardware-aware neural architecture search for resource-constrained FPGA deployments, providing an incremental improvement by integrating existing methods into a practical framework.
The paper tackled the problem of accurately optimizing neural networks for real hardware performance in FPGA deployment by introducing SNAC-Pack, an integrated framework that automates multi-objective optimization across accuracy, resource utilization, and latency, achieving 63.84% accuracy with resource estimation and matching baseline accuracy on an FPGA while maintaining comparable resource utilization.
Neural Architecture Search is a powerful approach for automating model design, but existing methods struggle to accurately optimize for real hardware performance, often relying on proxy metrics such as bit operations. We present Surrogate Neural Architecture Codesign Package (SNAC-Pack), an integrated framework that automates the discovery and optimization of neural networks focusing on FPGA deployment. SNAC-Pack combines Neural Architecture Codesign's multi-stage search capabilities with the Resource Utilization and Latency Estimator, enabling multi-objective optimization across accuracy, FPGA resource utilization, and latency without requiring time-intensive synthesis for each candidate model. We demonstrate SNAC-Pack on a high energy physics jet classification task, achieving 63.84% accuracy with resource estimation. When synthesized on a Xilinx Virtex UltraScale+ VU13P FPGA, the SNAC-Pack model matches baseline accuracy while maintaining comparable resource utilization to models optimized using traditional BOPs metrics. This work demonstrates the potential of hardware-aware neural architecture search for resource-constrained deployments and provides an open-source framework for automating the design of efficient FPGA-accelerated models.