High Convergence Rates of CMOS Invertible Logic Circuits Based on Many-Body Hamiltonians
This work addresses a performance bottleneck in probabilistic computing circuits for hardware applications, though it appears incremental as it builds on existing two-body Hamiltonian methods.
The paper tackles the problem of slow convergence in CMOS invertible-logic circuits by introducing a three-body Hamiltonian design, which achieves few-times higher convergence rates compared to conventional two-body circuits with negligible area overhead on FPGA.
This paper introduces CMOS invertible-logic (CIL) circuits based on many-body Hamiltonians. CIL can realize probabilistic forward and backward operations of a function by annealing a corresponding Hamiltonian using stochastic computing. We have created a Hamiltonian that includes three-body interaction of spins (probabilistic nodes). It provides some degrees of freedom to design a simpler landscape of Hamiltonian (energy) than that of the conventional two-body Hamiltonian. The simpler landscape makes it easier to reach the global minimum energy. The proposed three-body CIL circuits are designed and evaluated with the conventional two-body CIL circuits, resulting in few-times higher convergence rates with negligible area overhead on FPGA.