ScaleBITS: Scalable Bitwidth Search for Hardware-Aligned Mixed-Precision LLMs
This work addresses the problem of efficient low-bit quantization for large language models, enabling hardware-aligned mixed-precision allocation, which is incremental but offers practical gains for deployment.
The paper tackles the challenge of reducing LLM memory and inference costs through post-training weight quantization below 4 bits, achieving up to 36% improvement over uniform-precision quantization and 13% over state-of-the-art baselines without runtime overhead.
Post-training weight quantization is crucial for reducing the memory and inference cost of large language models (LLMs), yet pushing the average precision below 4 bits remains challenging due to highly non-uniform weight sensitivity and the lack of principled precision allocation. Existing solutions use irregular fine-grained mixed-precision with high runtime overhead or rely on heuristics or highly constrained precision allocation strategies. In this work, we propose ScaleBITS, a mixed-precision quantization framework that enables automated, fine-grained bitwidth allocation under a memory budget while preserving hardware efficiency. Guided by a new sensitivity analysis, we introduce a hardware-aligned, block-wise weight partitioning scheme, powered by bi-directional channel reordering. We formulate global bitwidth allocation as a constrained optimization problem and develop a scalable approximation to the greedy algorithm, enabling end-to-end principled allocation. Experiments show that ScaleBITS significantly improves over uniform-precision quantization (up to +36%) and outperforms state-of-the-art sensitivity-aware baselines (up to +13%) in ultra-low-bit regime, without adding runtime overhead.