Analog Error Correcting Codes with Constant Redundancy
This work addresses the problem of correcting outlying errors in analog implementations of vector-matrix multiplication for researchers and engineers working with analog computing hardware, offering an incremental improvement in code efficiency.
This paper explores analog error-correcting codes (analog ECCs) for vector-matrix multiplication, focusing on codes with unit Euclidean norm columns in their parity check matrix. The authors construct a family of single error-correcting analog ECCs with a constant redundancy of three for any code length, achieving a smaller height profile compared to existing MDS constructions.
Analog error-correcting codes (analog ECCs) introduced by Roth are designed to correct outlying errors arising in analog implementations of vector-matrix multiplication. The error-detection/correction capability of an analog ECC can be characterized by its height profile, which is expected to be as small as possible. In this paper, we consider analog ECCs whose parity check matrix has columns of unit Euclidean norm. We first present an upper bound on the height profile of such codes as well as a simple decoder for correcting a single error. We then construct a family of single error-correcting analog ECCs with redundancy three for any code length, which has smaller height profile compared to the known MDS constructions.