Characterization of Off-wafer Pulse Communication in BrainScaleS Neuromorphic System
This work addresses communication bottlenecks for large-scale neuromorphic hardware, enabling more efficient emulation of spiking neural networks, though it is incremental in nature.
The authors characterized the off-wafer pulse communication infrastructure in the BrainScaleS neuromorphic system, measuring throughput, delay, jitter, and pulse loss, and analyzed how these distortions affect a neural benchmark model with varying spike activity.
Neuromorphic VLSI systems take inspiration from biology to enable efficient emulation of large-scale spiking neural networks and to explore new computational paradigms. To establish large neuromorphic systems, a sophisticated routing infrastructure is needed to communicate spikes between chips and to/from the host computer. For the BrainScaleS wafer-scale neuromorphic system considered in this work, especially the stimulation with input spikes and the recording of spikes is demanding, requiring high bandwidth and temporal resolution due to the accelerated emulation of neural dynamics 10.000 faster than biological real time. Here, we present a systematic characterization of the BrainScaleS off-wafer communication infrastructure implemented around Kintex7 FPGAs. The communication flow is characterized in terms of throughput, transmission delay, jitter and pulse loss. Further, we analyze the effect of the communication distortions (like pulse loss and jitter) on a neural benchmark model with highly varying spike activity. The presented methods and techniques for communication evaluation are general applicable and provide useful insights for the mapping of network models to the hardware such as the distribution of input spikes across communication channels.