A 0.5-V Linear Neuromorphic Voltage-to-Spike Encoder Using a Bulk-Driven Transconductor
This work addresses the need for efficient and linear spike encoding in neuromorphic hardware, representing an incremental improvement with specific performance gains.
The paper tackles the problem of achieving linear voltage-to-spike conversion in neuromorphic encoders by introducing an ultralow-power design using a bulk-driven transconductor and DPI-based LIF neuron, resulting in less than 5.6% deviation from linearity over a 0.1-0.4 V input range while consuming 22-180 nW.
This work introduces an ultralow-power voltage-to-spike encoder that achieves near-linear voltage-to-firing-rate conversion by pairing a linearized bulk-driven transconductor with a DPI-based LIF neuron. A tail-less bulk-driven differential pair improves large-signal linearity, while a translinear linearization network suppresses the dominant sinh nonlinearity and stabilizes the bias-tunable V-to-I gain. The resulting current feeds a DPI front-end that linearizes current-to-spike conversion. Fabricated in TSMC 0.18-um CMOS and operating at VDD = 0.5 V with 2-27 nA reference current, the encoder achieves a deviation of less than 5.6 percent from linearity over 0.1-0.4 V input, consumes 22-180 nW, and occupies 0.0074 mm^2.