Robust Reasoning and Learning with Brain-Inspired Representations under Hardware-Induced Nonlinearities
This work addresses the critical problem of enabling robust machine learning on emerging compute-in-memory hardware for classification and reasoning tasks.
The paper tackles hardware-induced nonlinearities in compute-in-memory architectures by proposing a hardware-aware optimization framework based on Hyperdimensional Computing. The method achieves 84% accuracy under severe perturbations (48% improvement over naive QuantHD) and a 5.4× accuracy improvement on the Cora dataset for graph-based reasoning.
Traditional machine learning depends on high-precision arithmetic and near-ideal hardware assumptions, which is increasingly challenged by variability in aggressively scaled semiconductor devices. Compute-in-memory (CIM) architectures alleviate data-movement bottlenecks and improve energy efficiency yet introduce nonlinear distortions and reliability concerns. We address these issues with a hardware-aware optimization framework based on Hyperdimensional Computing (HDC), systematically compensating for non-ideal similarity computations in CIM. Our approach formulates encoding as an optimization problem, minimizing the Frobenius norm between an ideal kernel and its hardware-constrained counterpart, and employs a joint optimization strategy for end-to-end calibration of hypervector representations. Experimental results demonstrate that our method when applied to QuantHD achieves 84\% accuracy under severe hardware-induced perturbations, a 48\% increase over naive QuantHD under the same conditions. Additionally, our optimization is vital for graph-based HDC reliant on precise variable-binding for interpretable reasoning. Our framework preserves the accuracy of RelHD on the Cora dataset, achieving a 5.4$\times$ accuracy improvement over naive RelHD under nonlinear environments. By preserving HDC's robustness and symbolic properties, our solution enables scalable, energy-efficient intelligent systems capable of classification and reasoning on emerging CIM hardware.