Cerberus: Cross-Layer ECC Co-Design for Robust and Efficient Memory Protection
For memory system designers, Cerberus addresses the problem of inefficient and overlapping ECC layers in high-density DRAM, offering a coordinated protection scheme that reduces redundancy and improves fault coverage.
Cerberus proposes a cross-layer ECC co-design that unifies device, link, and system ECC layers, reducing redundancy and coverage gaps while improving resilience to clustered and peripheral faults. Evaluations show improved resilience and reduced overhead for next-generation memory systems.
As DRAM scales to higher density and I/O speeds, ensuring data correctness becomes increasingly difficult. Industry has responded with a three-layer stack: on-die ECC (O-ECC), link ECC (L-ECC), and system ECC (S-ECC). However, these layers have evolved independently, often duplicating redundancy, leaving coverage gaps, and occasionally interfering. We propose Cerberus, a cross-layer ECC co-design that unifies protection across device, link, and system while preserving the native role of each layer. At its core is an Encode-Once, Decode-Many (EODM) architecture: the controller performs a single encoding whose redundancy is reused by L-ECC for immediate write-path detection and retry, by O-ECC for in-device repair on reads, and by S-ECC for strong end-to-end recovery. Cerberus jointly designs complementary parity and syndrome structures, orders decoders, and allocates the correction budget to prevent miscorrection amplification and enable selective correction under tight redundancy constraints. Our evaluations show improved resilience to clustered and peripheral faults while reducing redundant overhead, underscoring the importance of coordinated cross-layer protection for next-generation memory systems, such as custom HBMs.