Complexity Horizons of Compressed Models in Analog Circuit Analysis
For engineers deploying LLMs in specialized domains like circuit analysis, this work provides a method to optimize model selection for efficiency without sacrificing accuracy, though it is incremental as it applies existing graph-based knowledge structuring to model compression.
The paper addresses the trade-off between reasoning accuracy and computational efficiency when deploying LLMs for circuit analysis. It proposes a performance-aware compression strategy using prerequisite graphs to select the smallest compressed model that meets task complexity, demonstrating granular mapping of compression to performance.
The deployment of Large Language Models (LLMs) for specialized engineering domains, such as circuit analysis, often faces a trade-off between reasoning accuracy and computational efficiency. Traditional evaluation methods treat model performance as a flat metric, failing to account for the hierarchical nature of engineering knowledge. We propose a performance-aware model compression strategy that utilizes prerequisite graphs to optimize model selection for circuit analysis tasks. By structuring electronics design concepts as Directed Acyclic Graphs (DAGs), we can identify the specific complexity horizons of an LLM's compressed variants' tiers. Our framework introduces an agentic pipeline for generating prerequisite-based datasets and a strategic evaluation engine that dynamically cascades queries across a spectrum of compressed variants of an LLM. This approach allows to select the smallest compressed model, given its conceptual knowledge boundaries in circuit analysis. Experimental results on analog electronics datasets demonstrate that prerequisite graphs provide a granular map of model compression with respect to the performance given circuit analysis complexity. (Source Code: https://github.com/pacomesimon/LLM_prereq_graphs_circuit_analysis, Demo: https://huggingface.co/spaces/pacomesimon/LLM_prereq_graphs_circuit_analysis)