MCFlash: Bulk Bitwise Processing in 3D NAND with Dynamic Sensing and Multi-level Encoding
This work provides a practical, deployable solution for in-memory computing in NAND flash, addressing the need for efficient bulk bitwise processing in storage systems.
MCFlash enables error-free bulk bitwise operations directly on commercial 3D NAND flash chips using standard instructions, achieving over 1 billion operations on fresh blocks and bit-error rates below 0.015% after 10,000 P/E cycles.
This paper presents MCFlash, a practical and immediately deployable technique for executing bulk bitwise operations directly within commercial off-the-shelf(COTS) 3D NAND flash chips. MCFlash relies solely on standard user-mode instructions, combining Multi-Level Cell (MLC) data encodings with dynamically tuned read reference voltages to execute in-place bitwise operations. We evaluate MCFlash across diverse NAND flash chips, both floating-gate and charge-trap variants, from different generations. Our results represent the first demonstration of error-free, on-chip bitwise operations, sustaining over one billion operations on fresh blocks and maintaining bit-error rates below 0.015% even after 10,000 program/erase (P/E) cycles.