Machine Learning-Based Graph Simplification for Symbolic Accelerators
For designers of symbolic data processing accelerators, AutoSlim offers a data-driven method to reduce memory and resource usage with verified functional equivalence.
AutoSlim uses a Random Forest classifier to prune automata graphs for hardware accelerators, reducing FPGA resource usage by up to 40% while improving throughput and power efficiency.
Graph-based accelerators have been widely adopted in symbolic data processing applications such as genomics, cybersecurity, and artificial intelligence. However, these systems often suffer from excessive memory usage and inefficiencies stemming from redundant graph structures. We present AutoSlim, a machine learning-based framework that leverages data-driven methods to prune automata graphs for hardware accelerators. Using features extracted from prior graph executions and a Random Forest classifier, AutoSlim identifies and removes low-impact nodes and edges. When applied to a Non-deterministic Finite Automata overlay architecture (NAPOLY+), AutoSlim reduces FPGA resource usage by up to 40%, with corresponding improvements in throughput and power efficiency. The framework includes a verification step to ensure functional equivalence after pruning and suggests promising directions for both hardware optimization and security.