Enabling Real-Time Phase Control in Traffic Signal Hardware-in-the-Loop Simulation
Enables testing of advanced traffic signal control algorithms in realistic hardware-in-the-loop simulations for traffic engineers.
Existing HILS testbeds only support pre-programmed timing plans; this work presents the first HILS testbed enabling real-time phase control for traffic signals, achieving sub-millisecond average latency.
Advanced Traffic Signal Control (TSC) algorithms require real-time phase control, yet existing Hardware-in-the-Loop Simulation (HILS) testbeds only support pre-programmed timing plans. In this paper, we present the first HILS testbed for real-time phase control. We develop a novel middleware architecture that translates dynamic phase actions (selection, switch, and duration) into commands for NTCIP-compliant commercial hardware controllers. This middleware manages phase transitions, synchronizes signal states, and handles errors without interrupting the hardware's internal operations. Experimental validation demonstrates that the system executes real-time phase commands, handles system conflicts, and achieves a low system internal latency at sub-millisecond on average.