ITINS-DETJun 12

Practical Low-Weight Codes for Energy-Efficient Bus Encoding

arXiv:2606.14203v18.0h-index: 9
Predicted impact top 43% in IT · last 90 daysOriginality Incremental advance
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For designers of energy-sensitive and memory-critical systems, this work provides practical, low-complexity encoding schemes that nearly match optimal performance.

The paper addresses minimizing bit-flips in data transmission to reduce energy consumption and extend memory longevity. It proposes two low-complexity bus encoding schemes that achieve a 24.7% bit-flip reduction with 8 extra bits on 64-bit data, close to the 26.4% reduction of optimal schemes.

We consider the transmission of data encoded into binary messages, with the goal of minimizing the Hamming distance, i.e., the number of bit-flips, between consecutive messages. This problem is relevant for enhancing the longevity of Non-Volatile Memories and reducing transition-induced energy consumption in data buses. Known as Write-Efficient Memory coding in the literature, this challenge has traditionally been addressed using optimal but complex schemes. In low-power computer systems the same topic is known as bus encoding. In this paper, we derive closed-form expressions to evaluate the average number of bit-flips for practical, sub-optimal encoding schemes, and propose two new schemes assisted by predefined random codebooks. We demonstrate that low-complexity solutions achieve performance very close to the optimal schemes, making them attractive for implementation in energy-sensitive and memory-critical applications. For instance, by adding 8 extra bits to 64-bits data, sub-optimal schemes can achieve a bit-flip reduction (related to energy saving) of approximately 24.7%, compared to the 26.4% reduction offered by the significantly more complex optimal scheme.

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