Croc: Training the Next Generation Chip Designers on Domain-Specific End-to-End Open Source Silicon
This work addresses the need for hands-on VLSI education by providing an open-source end-to-end design flow, enabling students to gain practical experience in chip design.
The authors present Croc, an open-source RISC-V SoC platform and design flow for training chip designers. In a course with 65 students, 33 projects were completed, 30 produced manufacturable layouts, 18 were tapeout candidates, 5 were fabricated, and one baseline chip was successfully characterized, demonstrating comparable metrics to closed-source designs.
The demand for domain-specific systems-on-chip (SoCs) in artificial intelligence, robotics, and automotive systems is increasing the need for engineers with hands-on expertise on very-large-scale integration (VLSI) design from architecture specification to fabricated silicon. Yet, most VLSI courses rely on restrictively licensed electronic design automation tools and process design kits (PDKs), as well as closed-source hardware designs. We present an end-to-end open-source domain-specific SoC design and fabrication flow built around Croc, a highly customizable RISC-V platform. Built from open-source SystemVerilog intellectual property blocks and integrated with an end-to-end open-source design flow in a 130nm open PDK, Croc enables tapeout projects supporting multiple domain customization options: instruction-set extensions, accelerator co-processors, and peripherals. In our first open-source course experience using Croc, 65 students completed 33 projects, 30 of which produced manufacturable layouts. 18 designs were selected as tapeout candidates, and five were fabricated. A first baseline chip has already been successfully characterized in silicon, demonstrating microcontroller-class functionality and implementation metrics comparable to those of products with similar functional complexity completed with closed-source toolchains and PDKs.