NEMESIS: NEtlist-Driven Modeling and Equation Synthesis with Inversion-Aware SPICE Anchoring
For analog circuit designers, NEMESIS provides a fast, accurate equation synthesis method that bridges analytical models and SPICE simulations, though limited to OTA topologies.
NEMESIS is a multimodal LLM framework for OTA design that generates SPICE-verified performance equations from netlists, achieving <7% average relative error and ~4622x speedup over full SPICE evaluation across five OTA topologies in 65nm PDK.
This work presents NEMESIS, a multimodal framework for operational transconductance amplifier (OTA) design using large language models (LLMs). NEMESIS strikes a balance between fast, approximate analytical models vs. accurate, computationally expensive SPICE evaluations. Given an OTA netlist and schematic, NEMESIS first identifies circuit primitives and then generates progressively more accurate performance equations. The framework begins with equations retrieved from the prior invocations of NEMESIS to structurally similar OTAs, if available; otherwise, it uses the LLM to derive the initial equations directly from the circuit input. These equations are iteratively refined via a SPICE-based repair loop. In a commercial 65nm PDK, NEMESIS is demonstrated on five OTA topologies, producing SPICE-verified equations across biasing ranges with <7% average relative error and a post-convergence evaluation speedup of ~4622x over full SPICE-based evaluation.