ThermoDSE: A Thermal-Aware and Comprehensive Design Space Exploration for Chiplet-Based DNN Accelerators
For designers of chiplet-based DNN accelerators, ThermoDSE provides a comprehensive optimization framework that addresses thermal and area constraints, offering significant improvements in efficiency and exploration speed.
ThermoDSE is a thermal-aware design space exploration framework for chiplet-based DNN accelerators that jointly considers architecture, task orchestration, and inter-chiplet communication under thermal and area constraints. It achieves up to 3.5x improvement in Energy-Delay-Inverse-Yield over Simba and other baselines, and converges 3.7x and 29.4x faster than simulated annealing and reinforcement learning methods, respectively.
Chiplet-based DNN accelerators provide a scalable path to balance performance and yield for modern AI workloads. However, such systems face critical challenges in area and thermal constraints. Design space optimization should jointly consider fine-grained task modeling, chiplet granularity, core granularity, and critical physical constraints. To the best of our knowledge, this is the first framework that involves all these factors. In this work, we propose ThermoDSE, a thermal-aware and comprehensive design space exploration framework for chiplet-based DNN accelerators. ThermoDSE integrates existing fine-grained modeling techniques into a unified simulation and optimization framework that jointly considers architecture design, task orchestration, and inter-chiplet communication under strict thermal and area constraints. Experimental results show that ThermoDSE achieves up to 3.5x improvement in Energy-Delay-Inverse-Yield, defined as E times D times inverse Y, compared with state-of-the-art Simba and other baselines. Furthermore, relative to simulated annealing and reinforcement learning-based methods, ThermoDSE converges to better design points with 3.7x and 29.4x runtime speedups, respectively.