Recurrent Neural Networks Hardware Implementation on FPGA
This work addresses the hardware bottleneck for RNNs in mobile devices, though it is incremental as it applies an existing method to a specific platform.
The paper tackled the challenge of parallelizing Recurrent Neural Networks (RNNs) on conventional hardware by implementing a Long-Short Term Memory (LSTM) network on a Zynq 7020 FPGA, achieving a speedup of over 21 times compared to an embedded ARM CPU.
Recurrent Neural Networks (RNNs) have the ability to retain memory and learn data sequences. Due to the recurrent nature of RNNs, it is sometimes hard to parallelize all its computations on conventional hardware. CPUs do not currently offer large parallelism, while GPUs offer limited parallelism due to sequential components of RNN models. In this paper we present a hardware implementation of Long-Short Term Memory (LSTM) recurrent network on the programmable logic Zynq 7020 FPGA from Xilinx. We implemented a RNN with $2$ layers and $128$ hidden units in hardware and it has been tested using a character level language model. The implementation is more than $21\times$ faster than the ARM CPU embedded on the Zynq 7020 FPGA. This work can potentially evolve to a RNN co-processor for future mobile devices.