Automatic Layout Generation with Applications in Machine Learning Engine Evaluation
This work addresses the need for better evaluation of machine learning models in semiconductor design, but it is incremental as it builds on existing hotspot detection methods by providing a new tool for testing.
The authors tackled the problem of evaluating the generalization of machine learning-based lithography hotspot detectors to complex patterns by introducing an automatic layout generation tool that synthesizes varied layout patterns based on design rules, and found that continuous study on model robustness is necessary for integrating these detectors into design-for-manufacturing flows.
Machine learning-based lithography hotspot detection has been deeply studied recently, from varies feature extraction techniques to efficient learning models. It has been observed that such machine learning-based frameworks are providing satisfactory metal layer hotspot prediction results on known public metal layer benchmarks. In this work, we seek to evaluate how these machine learning-based hotspot detectors generalize to complicated patterns. We first introduce a automatic layout generation tool that can synthesize varies layout patterns given a set of design rules. The tool currently supports both metal layer and via layer generation. As a case study, we conduct hotspot detection on the generated via layer layouts with representative machine learning-based hotspot detectors, which shows that continuous study on model robustness and generality is necessary to prototype and integrate the learning engines in DFM flows. The source code of the layout generation tool will be available at https://github. com/phdyang007/layout-generation.