VLSI Mask Optimization: From Shallow To Deep Learning
This work addresses mask optimization for VLSI design, which is incremental as it builds on existing machine learning techniques for DFM problems.
The paper tackles the costly and complex problem of VLSI mask optimization in manufacturability-aware design by proposing a heterogeneous OPC framework, showing preliminary results of efficiency and effectiveness as potential alternatives to existing EDA solutions.
VLSI mask optimization is one of the most critical stages in manufacturability aware design, which is costly due to the complicated mask optimization and lithography simulation. Recent researches have shown prominent advantages of machine learning techniques dealing with complicated and big data problems, which bring potential of dedicated machine learning solution for DFM problems and facilitate the VLSI design cycle. In this paper, we focus on a heterogeneous OPC framework that assists mask layout optimization. Preliminary results show the efficiency and effectiveness of proposed frameworks that have the potential to be alternatives to existing EDA solutions.