Enabling Fast Exploration and Validation of Thermal Dissipation Requirements for Heterogeneous SoCs
This addresses the problem of slow configuration optimization for SoC designers, though it is incremental as it applies existing system identification methods to a specific domain.
The paper tackles the challenge of efficiently exploring and validating thermal dissipation requirements for heterogeneous SoCs, proposing a modeling approach that reduces exploration time by several orders of magnitude, as demonstrated on an Odroid-XU4 board.
The management of the energy consumption and thermal dissipation of multi-core heterogeneous platforms is becoming increasingly important as it can have direct impact on the platform performance. This paper discusses an approach that enables fast exploration and validation of heterogeneous system on chips (SoCs) platform configurations with respect to their thermal dissipation. Such platforms can be configured to find the optimal trade-off between performance and power consumption. This directly reflects in the head dissipation of the platform, which when increases over a given threshold will actually decrease the performance of the platform. Therefore, it is important to be able to quickly probe and explore different configurations and identify the most suitable one. However, this task is hindered by the large space of possible configurations of such platforms and by the time required to benchmark each configurations. As such, we propose an approach in which we construct a model of the thermal dissipation of a given platform using a system identification methods and then we use this model to explore and validate different configurations. The approach allows us to decrease the exploration time with several orders of magnitude. We exemplify the approach on an Odroid-XU4 board featuring an Exynos 5422 SoC.